TIRAMISU

The MSCA project TIRAMISU (Training and Innovation in Reliable and Efficient Chip Design for Edge AI) provide strong interdisciplinary training for future European AI chip engineers and researchers.

Situation

Artificial intelligence is increasingly being brought to the source of data, thus establishing the Edge AI concept. Edge AI is gaining momentum across various industries and services by public authorities and enables new applications requiring high performance, ultra-low latency with high bandwidth, efficient power use, and intelligence beyond regular computing. Its strategic importance is emphasised through the EU Chips Act monetary investments in the EU semiconductor supply chain, highlighting the urgent need for a qualified workforce. The advancements in Edge AI applications face critical research and engineering challenges related to limited computing and energy resources of the edge devices, limitations of the existing AI algorithms and their insufficient fit. Also, the related rapid technological advancements, market dynamics, interdisciplinary, and regulatory uncertainty set a unique challenge for the valorisation and management of Edge-AI innovations. The general research objective of TIRAMISU is a practical methodology for reliable and energy-efficient Edge AI hardware backbone design and innovation management.

Approche

The BFH takes on a crucial role in this project by hosting two doctoral student. The first doctoral student focuses on the human oversight, thus making sure that the technology and innovation outcomes of the project are in line with relevant regulations like the EU AI-act while also ensuring that they are both, responsible and inclusive. The second doctoral student focuses on the innovation management by identifying use cases and business models that emerge from the technological development taking place in the project.